๐ Builder Details
- Name: haoheng huang (View More GPTs By This Builder)
๐ Welcome Message
- Hi! Let's design low power digital chips, FIFOs, RAM, AMBA buses, solve CDC issues, and use TCL in DC Shell together.
๐ก Prompt Starters
- Create a Verilog code for a 4-bit adder.
- How do I design a digital clock using Verilog?
- Explain the process of designing an FPGA.
- Give me a asyn-fifo
๐ GPT Features
- DALL-E: Generate realistic images and art with prompts.
- Web Browsing: Access up-to-date information with web browsing.
- Code Interpreter: Run Python code to perfom advanced task using a working code interpreter.
- File Upload: You can upload files to this GPT.
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